Witam, mam prosbe... moze kots mi powiedziec czy takie pamieci RAM czy beda chodzily na Ausie A8N-SLI?
Product Description : TWO PIECES 1GB DDR TOTAL 2GB OF RAM Product Description And Specifications DDR400 SDRAM provides nearly four times the memory bandwidth of earlier PC100 and PC133 DRAM solutions as well as the DDR266 and DDR333 Upgrade to these. This bandwidth improvement is reached by transferring data on both the rising and falling edge of the clock cycle, hence the name "Double Data Rate." Other benefits of DDR SDRAM include enhanced multimedia capabilities, increased PC headroom for memory-intensive applications, and enhanced server capabilities for faster data mining. Description: * JEDEC Standard * standard 184-pin Double Data Rate SDRAM DIMM Format * 6NS Speed * Ultra-High Performance two data transfers per clock cycle unbuffered address path for desktop applications * Peak Memory Bandwidth of 3.2GB/sec * Voltage: 2.5V * Compatible with SOME PC3200 motherboards 128*64 HIGH DENSITY * PC3200 400Mhz FOR AMD SYSTEM'S VIA SIS CHIP SET'S * DIMM Lead pitch: 1.27 mm * PCB Heigth: 1.25 inches * Chip Configuration: 128 x 4 HIGH DENSITY * Chip Density: 2GBBits (32Mbits x 8 rows) * Chip Layout: 8 Chips/Side, Double Sided * SSTL-2 I/O Interface 128x64 * SPD Support Not Low Density Or All Compatible * CAS Latency (CL): 3 * Pin: 184-PIN * Pin Type: Gold Plated * Module: DIMM Technical Specifications: * Double-data-rate architecture; two data transfers per clock cycle * Bidirectional data strobe(DQS) * Four banks operation * Differential clock inputs(CK and /CK) * DLL aligns DQ and DQS transition with CK transition * MRS cycle with address key programs - Read latency 2, 2.5 (clock) - Burst length (2, 4, 8) - Burst type (sequential & interleave) * All inputs except data & DM are sampled at the positive going edge of the system clock(CK) * Data I/O transactions on both edges of data strobe * Edge aligned data output, center aligned data input * DM for write masking only (x4, x8) * Auto & Self refresh * 7.8us refresh interval(8K/64ms refresh) * Maximum burst refresh cycle : 8 NOT FOR ASUS NVIDIA CHIP SET'S * 66pin TSOP II package (MAINBOARD'S CHIPSETS CAN SUPPORT HI-DENSITY DDR DRAM ) AMD System's Chip Set's "VIA APPOLLO P4X400" "VIA K8M800" "VIA K8M890" "VIA K8N800" "VIA K8N890" "VIA K8T800" "VIA K8T890" "VIA K8T900" "VIA PT800" "VIA PT880" "VIA PT890" "VIA P4M800" "VIA P4M800 PRO" "VIA P4M890" "VIA P4M900" "VIA PN800" "SIS 648" "SIS 649" "SIS 650" "SIS 651" "SIS 656" "SIS 661" "SIS 748" "SIS 750" "SIS 755" "SIS 756" According to manufacture testing result, this DDR DIMM is suggested to work with the following Mother Board CHIPSET (refer to your motherboard manual or contact your motherboard manufacture): *.VIA P4X266A *.VIA KT400 *.VIA KT600 *.VIA PT800 *.SIS 645 *.SIS 648, 648FX *.SIS 746FX EXCEPT ASUS, GIGABYTE MOTHERBOARDS! If your motherboard does not have above listed chipset, please purchase the INDUSTRY STANDARD Memory which is more universal and 99% compatible with ALL Motherboards. The Industry Standard DDR DIMM is located at the same section. ***NOTE*** HIGH DENSITY MEMORY WILL NOT WORK ON BRAND NAME COMPUTERS! Please check your motherboard specification for memory type before you purchase it. It is not our responsibility for any incompatibilities of the systems and memory. Customer will be responsible to return the memory for exchange or credit. In addition, the shipping and handling fee is not refundable. Thank you. All returns are subject to twenty percent (20%) or $25, whichever greater, restocking fee or current market value at Computers,Inc discretion. [/code]